1. Field of the Invention
The present invention relates to a computer system, and more specifically, to a computer system having a controllable host based on a user signal emitted by an identification device.
2. Description of the Prior Art
Due to advances in computer technology, a computer system is used to quickly swap and process various graphical, text data information, and enhance the effectiveness and enjoyment of work and life. Recently, the operating speed of the computer has increased along with the development of the central processing unit (CPU). As the operating speed of the CPU surpasses the frequency of a giga-hertz (GHz), the amount of data that the CPU can handle also increases significantly. The amount of date that the CPU is capable of processing per second is also substantially increasing as the power consumption is also going up. Therefore, various ways, such as monitoring the status of the display, monitoring the operation of the hard disk, and entering a sleep mode when the computer is idle for a default period, for reducing power consumption or for making the battery running longer are utilized. In a conventional computer, power consumption generated by the CPU takes a great part of the whole computer. As a result, the way in which the CPU is operated at lower frequencies when the user does not manipulate the computer is a usual strategy for power saving.
Additionally, users almost always run their computers for a long time. Sometimes users may temporarily logout or lock their computer to keep the computer from being used because in some condition users have to temporarily leave. In this way, users have to manually change, which causes more trouble.
Please refer to FIG. 1, which shows a functional block diagram of a computer system 10 according to the prior art. The computer system 10 comprises a CPU12, a north bridge (NB) chipset 14, a south bridge (SB) chipset 16, a volatile memory 18, a basic input output system 20, a power supply 22, a display device 24, an input interface 26, a hard disk drive (HDD) 28, and a bus 30.
The CPU 12 is used for executing the operations of the computer system 10 to implement the integrated functions of the computer system 10. The north bridge chipset 14 is electrically connected to the CPU 12 for handling the data exchange between the CPU 12, and the memory 18 as a DRAM. The display device 24 is used for providing a visual image output of the computer system 10. The south bridge chipset 16, electrically connected to the north bridge chipset 14, is used for data-exchanging with the CPU 12 by way of the north bridge chipset 14, for example, data-exchange between the input interface 26, the HDD 28 and the CPU 12. The bus 30 is used as a connection path among the south bridge chipset 16, the HDD 28, the BIOS 20, the input interface 26 and other peripheral devices. The power supply 22 is used for supplying required power to the elements of the computer system 10 such as the north bridge chipset 16, the CPU 12, and so on (for clarity, only a connection between the power supply 22 and the CPU 12 is shown in FIG. 1). The HDD 28 is used for storing an operating system (OS) 32 and application program 34. The input interface 26 includes a keyboard, a mouse, and so on.
While the computer system 10 starts running, the power supply device 22 starts supplying power to the north bridge chipset 14, the south bridge chipset 16, the CPU 12, the HDD 28, and memory 18. Later on, the BIOS 20 is loaded into the memory 18 and implements a power on self test (POST) procedure, and the OS 32 stored in the HDD 28 is then loaded to the memory 18. Before performing the application program 34 stored in the HDD 28, the CPU 12 will generate a command to access data on the HDD 28. The data from the HDD 28 will then be transmitted through the south bridge chipset 16 to the north bridge chipset 14. Afterwards, the north bridge chipset 14 transmits the data from the HDD 28 to the memory 18 for storage. Thus, the CPU 12 can access the data from the HDD 28 in the memory 18 through the north bridge chipset 14 and temporarily store the data in flash memory of the CPU 12 (not shown) for carrying on the additional operations.
When users stop inputting any data for a default period, the display device 24 of the computer system 10 will enter a save power mode. If the user's eyesight does not move from the display device 24, and just stop inputting data for such default period, the computer system 10 will also enter save power mode, causing the user's work to be interrupted. Generally speaking, most ways of setting the save power mode is managed by a power management program which is implemented by the BIOS 20 or the OS 32.
According to the advanced configuration and power interface (ACPI), the devices connected to an integrated device electronics (IDE) have to response to the computer system 10 based on its operating modes such as an idle mode, a standby mode, or a sleep mode. Therefore, if intending to re-enable the computer system 10, triggering the input interface 26 is necessary. If the user has to focus on the display device 24 without any input for a long time, he should turn off the function for saving mode, lest sudden interruption of his work. However, short default period arrangement results in frequently switching to the save mode, but a long default period arrangement results in a worse save power effect.